One general problem is that the offset voltage becomes summed up into baseband signals. This can happen, for example, in I/Q receivers which are used in mobile communications, that is receivers in which a baseband in-phase signal and quadrature signal are formed. The problem is a particular problem in so-called direct conversion receivers in which the received signal is converted directly to a baseband and the baseband extends to near the zero frequency. Then the offset voltage may be considerably higher than the pre stage noise in which case the signal-to-noise ratio deteriorates largely due to this effect of the offset voltage.
The formation of the offset voltage can be due to many different factors:
The local oscillator of a receiver may itself become linked to the front of the receiver that is to high-frequency parts in which case the local oscillator signal obtains access to the radio frequency gate that is to the RF gate of the I/Q modulator and becomes mixed with the actual local oscillator signal which is entering the local oscillator gate, that is the LO gate at the actual mixer and forms an offset signal at the output of the mixer. The strength of this signal will depend on the phase and level of the local oscillator signal. This phenomenon has been described in more detail, for example, in U.S. Pat. No. 5,212,826.
Secondly, the harmonic frequency of the clock oscillator which impacts on the channel frequency can become mixed with the local oscillator signal and form direct voltage at the output of the mixers in the I/Q demodulator.
At the receivers using intermediate frequency, the second local oscillator signal can itself become linked to the first local oscillator signal, in which case the signals get mixed with each other in the first mixer and as a result they form a mixing result which impacts on the intermediate frequency and generates offset voltage at the output of the I/Q demodulator.
In addition, offset voltage can be generated into baseband signals from switching on the supply voltages of the receiver.
The above mentioned phenomena which lead to the generation of offset voltage are not described in more detail in this context because these phenomena are prior known to a person skilled in the art. Also several methods are prior known for removing the offset voltage:
If the offset voltage stayed constant during the entire reception time, it would be possible to remove the offset voltage digitally. In that case, the dynamics of the analog/digital converter, that is the A/D converter should, however, be extended by the highest possible offset voltage, which would raise considerably the price of the A/D converters. In addition, extra digital signal processing would require higher clock frequencies, which in turn would lead to increased current consumption by the device.
Problems which are due to leakage and detrimental connection of signals can be reduced by increasing RF shielding but this will lead to an increase in the size and weight of the device, and especially with respect to direct conversion receivers it is not possible to adequately resolve the problem with this approach.
By using two intermediate frequencies, the problem can be overcome almost entirely but, due to large amount of components and intermediate frequency filters needed, the receiver will be expensive and large in size.
FIG. 1 shows a prior known block diagram of a transmitter-receiver of a mobile station and in this block diagram, the receiver is a so-called direct conversion receiver. An RF signal received by an antenna 138 is conducted via a duplex filter 102 to a pre-amplifier 104. The purpose of the duplex filter is to permit the use of the same antenna both in transmitting and in receiving. Instead of a duplex filter, also a synchronous antenna changeover switch can be used in a time-division system. An RF signal received from an amplifier 104 is low-pass filtered 106 and demodulated in an I/Q demodulator 108 into an in-phase signal 108a and into a quadrature signal 108b. A local oscillator signal 114b which is needed in demodulation is received from a synthesizer 114. In block 110, removal of direct voltage and automatic gain control (AGC) are carried out. Block 110 is controlled by a processing block 116 which may contain, for example, a microprocessor. Automatic gain control is regulated by a signal 110a and removal of offset voltage is regulated by a signal 1100b. Signals received from the block 110 are converted into digital signals in block 112 from which the signals are further transferred to digital signal processing circuits in the processing block 116.
The transmitter unit comprises an I/Q modulator 128 which forms from an in-phase signal 128a and from a quadrature signal 128b, a carrier-frequency signal which is low-pass filtered and/or high-pass filtered by a filter 130. The carrier-frequency signal is amplified by an RF amplifier 132 and the amplified signal is transferred via a duplex filter 102 to the antenna 138. A power control unit 134 of the transmitter controls the amplification of the RF amplifier 132 on the basis of the measured output power 136 and of the control 134a received from the processor.
FIG. 1 also shows, to the processing unit, the memory unit 126 and user interface means which comprise a display 118, a keyboard 120, a microphone 122 and an earpiece 124.
In the following, a prior known circuit arrangement for reducing offset voltage is described in more detail by means of FIG. 2, and this is linked to the block 110 of the receiver shown in FIG. 1. Application of a solution such as this in a time division multiple access (TDMA) has been described, for example, in U.S. Pat No. 5,212,826.
In a circuit according to FIG. 2, a baseband signal Vin is conducted to an amplifier 1, the output P1 of which has been conducted via a capacitor C1 to the input P2 of an amplifier 2. In the place of the amplifier 2 there can also be, for example, an analog/digital converter. To the input of the amplifier 2, a reference voltage has been conducted via a resistor R1. Prior to the start of the receiving, a short control pulse DCN switches a switch 3 into an on-state in which case the output terminal of the capacitor C1 becomes set at a reference voltage Vref and at the point P2 if there is any offset voltage, it is dissipated.
FIG. 3 shows a baseband signal occurring at point P1, in which signal an offset voltage is generated at the time point 0.5 ms. In this figure, like in all the other enclosed figures showing signals, the vertical axis shows the amplitude of the signal and the horizontal axis shows the time. If the DCN pulse is not used, at the point P2 and at the output signal Vout there occurs, in addition to the baseband signal, a slowly falling offset voltage that is the direct voltage component which approaches slowly the value Vref. A signal occurring at point P2 has been shown in FIG. 4. It is to be noted that the offset voltage can be reduced by using the mere capacitor C1 on its own. The capacitor C1 has to be, however, designed on the basis of the lower limiting frequency of the baseband signal, which is the reason why the time constant of the reduction of the offset voltage is far too great in practice.
FIG. 5 shows a situation where there is no baseband signal Vin on the signal path but at point P2 there occurs only the generating offset voltage which is removed by using the DCN control pulse shown also in FIG. 5. It is easy to observe from FIG. 5 that after the rise of the DCN control pulse, the offset voltage occurring at point P2 is dissipated.
FIG. 6 shows a situation where on the signal path there is a baseband useful signal in addition to the offset voltage. The DCN control pulse removes the offset voltage occurring at point P2 in the same way as in the case shown in FIG. 5 but, as the DCN control pulse ends, a negative offset voltage is generated at point P2. In this situation, the offset voltage is not dissipated but the operation of the removing circuit of the offset voltage results in a new offset voltage which falls slowly towards the reference voltage Vref. This new offset voltage caused by the removing circuit of the offset voltage depends on how great the instantaneous value of the baseband signal occurring in the capacitor C1 is at the moment when the DCN control pulse ends.
In order to circumvent the new offset voltage resulting from the removing circuit of the offset voltage, in the solution described above, the zeroing of the offset voltage should be performed at such an instant when the received signal is essentially noise, which means in practice before the onset of the signal reception. In many time-division systems for mobile communications, such as GSM (Global System for Mobile Communications) and PCN (Personal Communications Network) systems, the power transmitted by the base station is not disconnected before the start of a new time interval. Thus there are baseband signals present in a receiver also before the start of the actual moment of reception, that is during the time when the offset voltage should be removed. This is why the earlier mentioned solution for reducing the offset voltage is not applicable in the above mentioned systems.